                              ===========================                             
                              R E L E A S E    N O T E S
                              ===========================

                         QLogic 5706/5708 Gigabit Ethernet Controller Bootcode

                      Copyright (c) 2015 QLogic Corporation
                                 All rights reserved.

Known issues
============

None.


History
=======

Version 4.6.1 (January 19, 2009)
================================
 
    Fixes:
    ------
    1.  Problem: IPMI fails to pass traffic after bnx2 is brought down
                 on one of the LOM designs (CQ#39016, 5706 C/S).

        Cause:   IPMI firmware is taking too long in processing packets,
                 hitting an assertion check in boot code. Since this
                 assertion check only applies to 5708, it is removed.

        Fix:     Remove the assertion check for 5706.


Version 4.6.0 (September 18, 2008)
==================================
 
    Fixes:
    ------
    1.  Problem: Link fails to come up with some remote PHY designs 
                 running RHEL (CQ#35993, 5708S).

        Cause:   The link preferences between bnx2 and boot code are
                 different, forcing the remote copper link to drop and
                 re-negotiate. This could take a longer time than the 
                 ifup script allows, causing RHEL to give up loading 
                 bnx2.

        Fix:     Fixes come in several folds. One is to optimize the
                 link preference in boot code to match that in bnx2. 
                 Another is to implement a link preference cache. If the
                 same preference has already been applied, boot code
                 will not touch the serdes link. The third fix is to
                 reset the serdes everytime the remote PHY applies a new
                 setting. This will clean out any residue settings
                 before exchanging BAM pages to remote PHY chip. The
                 last change is to delay the remote PHY processing when 
                 driver is not present. This avoids the remote PHY 
                 preference setting confusion due to back-to-back reset 
                 when bnx2 is brought up in subsequent load.


    2.  Problem: Remote PHY 1G link duplexity may not be correct 
                 (5708S).

        Cause:   The autoneg advertises both duplexities when either one
                 is specified in the link preference.

        Fix:     Treat each duplexity attribute separately.


    3.  Problem: There is a unlikely potential that some systems may 
                 assert NMI due to incomplete PCIE transaction when
                 host attempts to access PHY.

        Cause:   The boot code continuously polling the MDIO access
                 completion without any delay in between. This could 
                 cause host access to time out on the PCIE side.

        Fix:     Added delay between polling.


    4.  Problem: Remote PHY link continues to be processed even though
                 the system has been put to sleep state (S1/S3/S4) with
                 no WOL enabled (5708S).


        Cause:   The remote PHY call routine is still invoked in this
                 scenario.

        Fix:     Stop invoking the routine.


    Enhancements:
    -------------
    1.  Request: Need more code space in 5708S boot code as it is almost
                 full (5708S).

        Changes: Further code space optimizations are done: Restructured
                 some functions; used memset() instead of initializing
                 array individually; used constants instead of variables
                 when possible; leverage bit field definitions to
                 perform bit shifting instead of if-else statements 
                 when translating link status and link preference; and
                 treat zero and non-zero as FALSE and TRUE, 
                 respectively.

        Impact:  Functionally none, over 300 bytes of code saved.


    2.  Request: Allow drivers to keep VLAN in the packets. Support
                 KEEP_VLAN feature.

        Changes: Advertise the RXMODE_KEEP_VLAN capability to the
                 driver. And also reflect the state of the hardware
                 in the shared memory, allowing mgmt FW to handle
                 packets accordingly.

        Impact:  None. 


    3.  Request: Strengthen the license validation scheme.

        Changes: Validate the internal shared secret against the SVID
                 and fall back to manuf key if the upgrade key is
                 expired.

        Impact:  Minimal, the shared secret and SVID should already be
                 properly programmed. The license expiration scheme has
                 not been used yet.


    4.  Request: Need license from hardware token to take effect 
                 immediately before driver is loaded (CQ#36909).
    
        Changes: Re-validate license after handshake with BIOS .

        Impact:  Minimal, invoke license validation routine after the
                 successful handshake with BIOS.


Version 4.4.1 (April 16, 2008)
=================================
 
    Fixes:
    ------
    1.  Problem: PXE and iSCSI boot drivers do not see link on the 
                 remote PHY (5708S).

        Cause:   The link status backup field was moved from the shared
                 memory to boot code global variable. As a result, the
                 link status information is not preserved across chip
                 reset.

        Fix:     The field is moved back to the shared memory to allow
                 the information to be preserved.


Version 4.4.0 (April 14, 2008)
=================================
 
    Fixes:
    ------
    1.  Problem: 5708S remote PHY code references reserved fields in
                 shared memory that are now allocated for 5709S (5708S).

        Cause:   These are mostly debug codes that need to be 
                 eliminated.

        Fix:     Eliminated those references that are for debug only.
                 For the ones that have functional meanings, 
                 alternatives are used.


    2.  Problem: A 5708S mezz design cannot fully power down the system
                 from Windows shutdown (5706 C/S and 5708 C/S).

        Cause:   When going to D3, the boot code is brought down, 
                 disabling the unprepared powerdown feature (via
                 interrupt as well as polling), which is necessary to 
                 drive SEL_VAUX# signal to let system to shut down 
                 completely. 

        Fix:     Allow the boot code to run even in chip is brought to
                 D3Hot state. A fix is also made to arm the unprepared 
                 powerdown interrupt immediately except for PCIE reset 
                 (as this needs delay to debounce multiple PCIE resets) 
                 so that SEL_VAUX# can take effect right away.


    3.  Problem: 5708S remote PHY intermittently takes a long time to 
                 link up (5708S).

        Cause:   The optimization introduced in v3.7.0 shortened the 
                 retry of link auto-negotiation on the serdes end. This
                 disrupts the copper link establishment.

        Fix:     Extended the delay before the retry.


Version 4.0.3 (December 18, 2007)
=================================
 
    Fixes:
    ------
    1.  Problem: 5708S NIC does not go down when VBD is unloaded 
                 (5708S, CQ#32025).

        Cause:   The serdes is already powered down; the powerdown 
                 sequence did not update the link status and LEDs. Thus, 
                 the LEDs stayed on.

        Fix:     Added link status and LED updates.


Version 4.0.2 (December 06, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: 5708S NIC may not get link (5708S).

        Cause:   The wait-for-link timeout is too short, continuously
                 triggering autoneg restart.

        Fix:     The timeout is qualified by energy detection such that
                 it will occur only when eneregy is not detected (i.e.
                 cable unplugged) for a certain number of continous 
                 attempts. This change is made only in remote PHY 
                 disabled case to minimize the impact on remote PHY.


    2.  Problem: 5708S NIC shows link when it is inactive (i.e. no WOL,
                 no mgmt FW, and no driver present) (CQ#32025, 5708S).

        Cause:   Since remote PHY is added, the link handling routine
                 has been called continuously, and that keeps the link 
                 active.

        Fix:     Check for the inactive condition. Stop link handling 
                 and disable the link when the condition occurs. This
                 change is made only in remote PHY disabled case to 
                 minimize the impact on remote PHY.


Version 4.0.1 (December 04, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: IPMI FW cannot pass traffic on a different blade server 
                 design (5708S, continuation of CQ#31473) in the OS 
                 present mode. In particular, the serial over LAN (SOL) 
                 traffic stops.

        Cause:   Boot code did not set the serdes to 1000X mode to allow
                 linking with a forced link partner.

        Fix:     Turn on 1000X mode to allow parallel detection when 
                 remote PHY is disabled.


    Enhancements:
    -------------
    1.  Request: Replace all chip codename references with chip numbers.

        Changes: Replace all chip codename references with chip numbers.

        Impact:  Functionally none, only documentation changes.


Version 4.0.0 (November 16, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: System intermittently fails during reboot test on one 
                 LOM design (CQ#31827).

        Cause:   Boot code is hung on PHY power down sequence. This 
                 prevents it from restarting itself back to OOB mode.
                 The OOB mode will let boot code to drive SEL_VAUX
                 signal to low, alloing the overall system to complete 
                 its own power down sequence.

        Fix:     The PHY power down sequence turns out to be unnecessary 
                 since a chip reset tightly follows it. The fix is to
                 remove this PHY power down sequence to allow boot code
                 to restart itself in OOB mode.


    Enhancements:
    -------------
    1.  Request: Allow access to MCP FIO space for better debug.

        Changes: Defined a host command interface to support this.

        Impact:  Code size increases.


Version 3.7.3 (October 26, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: OS driven WOL does not work when WOL is disabled in the
                 NVRAM configuration (5706 C/S, 5708C, CQ#32046).

        Cause:   Boot code inadvertently powers down the PHY when the OS
                 puts the device to D3 state if WOL and management FW 
                 are disabled in the NVRAM. 

        Fix:     Gate the logic to prevent PHY powerdown when OS wants
                 WOL enabled.


Version 3.7.2 (October 11, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: IPMI FW cannot pass traffic on one blade server design
                 (5708S, continuation of CQ#31473) in the OS present 
                 mode. 

        Cause:   Boot code was returning an uninitialized status code,
                 misleading IPMI FW to skip processing of incoming 
                 packets from the network.

        Fix:     Return correct status code.


Version 3.7.1 (October 08, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: Link and traffic LEDs stay on even when no driver is
                 loaded and neither WOL nor mgmt FW is enabled 
                 (5706C, 5706S, 5708C, CQ#31503).

        Cause:   Boot code fails to detect the D3Hot condition.

        Fix:     Added the D3Hot condition check and power down the PHY
                 accordingly.


    2.  Problem: IPMI FW cannot pass traffic on one blade server design
                 (5708S, CQ#31473). 

        Cause:   Boot code detected an invalid write VPD request and 
                 halted.  As a result, IPMI FW cannot drive SMBus to 
                 respond to BMC, causing an invalid MAC address to be 
                 used in the Rx filter on subsequent reset. The invalid
                 request could be coming from the device itself.

        Fix:     Ignore the invalid write VPD request on power up since
                 the device does not support VPD writes.


Version 3.7.0 (September 24, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: License validation fails, preventing offload when
                 virtual MAC address is applied on NICs (CQ#31332).

        Cause:   The license validation algorithm was looking up the
                 MAC address from the shared memory. In the case of
                 virtual MAC address applied, the value is different.
                 Hence, the validation fails. 

        Fix:     Look up the MAC address from the NVRAM instead.


    Enhancements:
    -------------
    1.  Request: Make some code optimization after having added 
                 "remote PHY" abilities (CQ#30933).

        Changes: Changes are mainly in remotephy.c file. Functions
                 are defined as "static" if they are only referred 
                 locally. Variables are moved to each function if 
                 the usage is local only. #ifdef RPHY_DBG is created
                 for globalizing some variables to help debugging.

        Impact:  Functionally none.


Version 3.5.12 (August 10, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: Remote PHY fails to link up again when replugging the
                 cable after going to Windows shutdown (5708S, 
                 CQ#30998).

        Cause:   The remote PHY module was making an unnecessary 
                 assertion check for turnaround time to handle BIOS 
                 handshake in Vaux power state. When boot code asserts
                 on this condition, it stops handling the link.

        Fix:     Perform assertion check only when system main power is
                 available since this is the time when BIOS is present.


Version 3.5.11 (August 07, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: WOL from S4 and S5 at 10Mbit failed on remote PHY 
                 systems (CQ#30881).

        Cause:   In both S4 and S5, the boot code failed to program the
                 correct EMAC mode to MII_10M when the link is detected
                 as 10Mb. Besides this issue being specific to 5708S, 
                 there is also a duplexity mismatch that can lead to a 
                 failure to wakeup on the first magic packet, this 
                 affects all boot code.

        Fix:     Set to MII_10M when 10Mb link is detected in the remote
                 PHY setup. Update the duplexity according to the current 
                 link state.


    2.  Problem: Linux driver failed to load when remote PHY is 
                 disabled (5708S, CQ#30951).

        Cause:   The boot code mis-reported the remote PHY capability,
                 leading the driver into issuing a set link command,
                 which is not processed. As a result, the driver does
                 not load.

        Fix:     Check for NVRAM configuration before reporting remote
                 PHY capability to the driver.


Version 3.5.10 (July 31, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: System fails to POST on warm reboot after iSCSI boot
                 fails to load due to cable unplugged (5708S, CQ#30712).

        Cause:   During iSCSI boot driver unload, the unplug of cable
                 caused the boot code to spin in a loop. The driver
                 times out during its unload. This has left some 
                 undesirable information in the memory, causing the
                 boot code to fail handling expansion ROM service in
                 the next boot. 

        Fix:     Add driver command check.


Version 3.5.9 (July 19, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: System crashes when running WinRegression tool's jumbo
                 frames tests (5708S, CQ#30306).

        Cause:   The remote PHY routine inadvertently altered the MTU
                 size value, allowing jumbo frames to enter while the
                 driver did not post buffer large enough to handle it.

        Fix:     Leave the control of the MTU size value to driver and
                 take out the modifcation from the boot code.


    2.  Problem: UMP traffic stopped when going to S4, S5, or ungraceful
                 shutdown (5706C, 5708C, CQ#30512).

        Cause:   The clock needs to be overridden for UMP traffic to run
                 properly. The original code was gating on "gigabit over 
                 Vaux" configuration, but prior versions (before 3.5.7) 
                 did not require this.

        Fix:     Override the clock as long as the LOM is configured to
                 allow Vaux current overdraw. The requirement of running
                 gigabit over Vaux is not necessary.


    3.  Problem: iSCSI/MBA fails to load on remote PHY setup when cable
                 is unplugged (5708S, CQ#30583).

        Cause:   The remote PHY routine falls into the retry routine, 
                 delaying the expansion ROM service. As a result, BIOS
                 times out in fetching MBA code.

        Fix:     Inserted expansion ROM request checks in the remote PHY
                 module, similar to BIOS handshake checks.


    4.  Problem: With UMP enabled, BACS failed to report valid license 
                 information when displaying it the second time (5706 
                 C/S & 5708C, CQ#30563).

        Cause:   Boot code suspended itself due to stack overflow 
                 during the first license validation issued by BACS. Any
                 subsequent license validation will fail, due to the 
                 boot code being halted.

                 This problem is first reported in boot code v3.5.4. In
                 that version, we had moved the starting point of the
                 boot code's 'heap' in the on-chip memory to a different 
                 location in order to make room for the growth of boot 
                 code.  As it turns out the actual runtime stack depth
                 exceeded the reserved space for the heap and the high 
                 watermark was wiped out as the stack grows during 
                 runtime.  With the high watermark gone, the boot code 
                 is suspended.

        Fix:     The starting address of the heap is moved back to the 
                 original location as used in v3.5.3.


    Enhancements:
    -------------
    1.  Request: Give indication to users which IO module is being 
                 used in the blade server environment. In particular,
                 if no IO module is inserted, users should be notified
                 as such (5708S).

        Changes: Defined a "no media detected" bit in the link status,
                 allowing applications to indicate this information.

        Impact:  Added logic for signal detection.


Version 3.5.8 (June 29, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: TOE handshake fails during POST in a mini midplane 
                 setup (5708S).

        Cause:   The frequency of checking for BIOS handshake is still
                 too low, causing timeout.

        Fix:     Inserted more command checking routine calls in other
                 execution loops inside the remote PHY module. The 
                 frequency has been enhanced. Also, assertion is added 
                 to catch the timeout condition. 


Version 3.5.7 (June 28, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: Interesting packet WOL does not work on some LOM 
                 designs (5708S, CQ#29325).

        Cause:   The clock was tuned at a slow rate such that a FIFO 
                 receives the interesting packet could not keep up. As
                 a result, the packet is corrupted, causing the matching 
                 to fail and no system wakeup.

        Fix:     Modified the clock adjustment policy to allow the clock
                 to be untouched in this case.


Version 3.5.6 (June 21, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: Link incorrectly stays up when Ethernet@Wirespeed is
                 disabled with a "broken" cable (5708S, CQ#30032).

        Cause:   Event notification is not always sent to the driver 
                 because conditional not always satisfied. As a result, 
                 the driver may not be aware of the link being down.

        Fix:     Eliminated conditional check so event is always posted.
                 Note that conditional was not absolutely required.


Version 3.5.5 (June 19, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: Windows S4 WOL does work when remote PHY is enabled
                 (5708S, CQ#29804, related to CQ#28906).

        Cause:   The EMAC mode was not properly programmed as the chip
                 goes to D3 state, causing a mismatch with the actual
                 link speed.

        Fix:     Re-sync the the EMAC mode to match the current link
                 speed as the driver is about to go away for S4 state.


    2.  Problem: Link incorrectly stays up when Ethernet@Wirespeed is
                 disabled with a "broken" cable (5708S, CQ#30032).

        Cause:   Remote PHY module was generating a link change event
                 based on a stale link status, masking link down event.

        Fix:     Prior to restarting remote PHY auto-negotiation, force
                 a link down event to be posted to the host before 
                 attempting to establish the next link up.


    3.  Problem: Remote PHY settings are not sticky across reboots
                 (5708S, CQ#29876).

        Cause:   The link settings from the driver were issued, and the
                 remote PHY auto-negotiation is restarted. However, a 
                 link down event is missing (see #2 above). The boot
                 code ended up posting a stale link status (which is
                 based on a default preference initialized by boot 
                 code). 

        Fix:     The fix is the same as #2.


Version 3.5.4 (June 18, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: BACS is not reporting the TOE offload (5708S, CQ#29633).

        Cause:   The code size increase corrupts the shared memory,
                 causing the command from BACS not seen by the boot code.

        Fix:     Moved the start location to accommodate a this code 
                 size increase.


Version 3.5.3 (June 15, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: TOE handshake errors when remote PHY feature is enabled
                 (CQ#29633).

        Cause:   Remote PHY auto-negotiation was taking too long,
                 causing timeout on the TOE handshake.

        Fix:     Time slice the remote PHY auto-negotiation to check on
                 the TOE handshake. 


    2.  Problem: IPMI FW does not load properly, particularly, the IPMI
                 runtime service image is not loaded (CQ#29985).

        Cause:   Incorrect variable was used to determine the IPMI image
                 type. The bug was introduced only in v3.5.2.

        Fix:     Use the correct variable to load the service image.


    Enhancements:
    -------------
    1.  Request: Provide information about currently loaded management
                 firmware for the host software (CQ#28907 and CQ#29308,
                 5706 C/S and 5708 C/S).

        Changes: Defined new fields in shared memory to indicate the 
                 type and the version information of the management
                 firmware being loaded.

        Impact:  Some code size increase.


Version 3.5.2 (June 08, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: For some OEM customers, BACS may report invalid licenses
                 while the internal firmware thinks they are okay, or 
                 vice versa (5706 C/S and 5708 C/S).

        Cause:   The method (whether to treat the license as universal
                 or note) used to validate licenses may not be the same
                 when invoked from host application.

        Fix:     Consolidate the license validation criteria and use the
                 same one throughout the boot code.


    2.  Problem: Need to stabilize boot code for 5706C, 5706S, 5708C.

        Cause:   There are integration issues with the remote PHY 
                 support to the source.

        Fix:     Reviewed and made necessary accommodations to ensure
                 the source to 5706C, 5706S, and 5708C are not effected.


    3.  Problem: TOE handshake with BIOS does not work properly (5708
                 C/S).

        Cause:   The BIOS handshake detection was mistreated as a
                 command for remote PHY.

        Fix:     Corrected the remote PHY command detection.


    4.  Problem: LEDs stay on after Linux driver is unloaded (5706C
                 and 5708C).

        Cause:   The PHY auto power down kicked in (see the fix #1 in
                 version 3.0.0) and prevented the LEDs to be updated
                 properly.

        Fix:     Force the LED to go out by setting the PHY into a 
                 loopback mode as it is powered down.


    Enhancements:
    -------------
    1.  Request: Provide an indication on which management firmware is
                 currently loaded (5706 C/S and 5708 C/S).

        Changes: Added the indication into the shared memory for driver
                 and host application to consume.

        Impact:  Some code size increase.


Version 3.5.1 (April 30, 2007)
================================

    Fixes:
    ------
    1.  Problem: ISCSI boot information is lost when Linux driver is
                 loaded again from sleep state (5706 C/S and 5708 C/S).

        Cause:   A chip reset occurs when it goes from D3Hot->D0. That 
                 reset is mis-treated as a warm reboot, and iSCSI boot
                 information is wiped out as a result.

        Fix:     Improve on the warm reboot qualification.


    Enhancements:
    -------------
    1.  Request: Add in-band MDIO for the remote PHY support (5708S).

        Changes: Add support for the in-band MDIO into the auto-neg
                 page exchange.

        Impact:  More code handling on the auto-neg.


Version 3.5.0 (April 20, 2007)
================================

    Fixes:
    ------
    1.  Problem: BACS shows 0 TOE connection for a particular OEM
                 customer (CQ#29058, 5706 C/S and 5708 C/S).

        Cause:   The license validation routine did not take the 
                 universal license key of this paricular OEM customer 
                 into consideration.

        Fix:     Include the universal license validation support
                 for this OEM customer.


    2.  Problem: Other boot code services (e.g. VPD) are not working.
                 (5708S).

        Cause:   The remote PHY has not been fully integrated into 
                 the overall boot code servicing loop. Instead, the
                 remote PHY feature took over the entire CPU resources.

        Fix:     Fully integrate the remote PHY support into the boot
                 code servicing loop.


    Enhancements:
    -------------
    1.  Request: Need a better message passing mechanism to/from driver
                 for the remote PHY related information.

        Changes: Modify the driver/firmware interface.

        Impact:  This is limited to local to remote PHY feature.


Version 3.4.3 (April 05, 2007)
================================
 
    Enhancements:
    -------------
    1.  Request: Add remote PHY support (5708S).

        Changes: New routines are added to support the feature.

        Impact:  Code sizes on 5708S are significantly larger.


    2.  Request: Reduce code sizes to fit remote PHY feature on 5708S.
                 (impacting 5706 C/S and 5708 C/S, see changes).

        Changes: Switch over to a new set of compiler tools (gcc v3.4.6).

        Impact:  Code sizes are reduced. Compiler optimization may 
                 affect the code behavior.


Version 3.4.2 (April 03, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: Virtual MAC address disappeared after driver 
                 loads/unloads (CQ#28965, #28979, 5706 C/S and 
                 5708 C/S).

        Cause:   Boot code skips updating the virtual MAC addresses
                 during driver load/unload. Prior to the update, the
                 boot code copies configuration parameters from NVRAM,
                 and that includes the physical MAC addresses. Thus,
                 the physical MAC addresses reappear on driver 
                 load/unload.

        Fix:     Boot code skips MAC address copying when transferring
                 configuration parameters from NVRAM to preserve the
                 virtual MAC addresses.


Version 3.4.1 (March 29, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: 5708 sends pulse frames when system is powered down
                 unexpectedly during the Linux shutdown sequence
                 (CQ#28142, 5708 C/S).

        Cause:   Driver issues a message to prepares the boot code 
                 for the chip reset due to unloading of driver. In
                 response to that, the boot code halts the CPU.
                 Just before the driver resets the chip, the system
                 loses power, leaving the chip in a bad state.

        Fix:     Boot code spins indefinitely to allow unprepared
                 powerdown feature to kick in to restore the chip state.


    Enhancements:
    -------------
    1.  Request: Support universal license key for another OEM.

        Changes: Modified the license validation scheme slightly when
                 this OEM's ID is recognized.

        Impact:  This relies on the phony MAC address field in the
                 license block of the NVRAM to have a fixed value.


Version 3.4.0 (January 30, 2007)
================================
 
    Fixes:
    ------
    1.  Problem: VPD read requests outside of the read-only area and
                 all VPD write requests cause boot code to hang
                 (CQ#28088).

        Cause:   Boot code caught the invalid range and blinked LEDs
                 indefinitely.

        Fix:     Simply return 0 on reads and treat writes as nops.


    Enhancements:
    -------------
    1.  Request: Support virtual MAC address, allowing OEMs to override
                 MAC addresses that are in NVRAM (CQ#27361).

        Changes: Introduced a handshake mechanism with BIOS, allowing
                 it to assign new MAC addresses for the controller.

        Impact:  None, just takes up a little more code space.


Version 3.0.0 (November 08, 2006)
================================
 
    Fixes:
    ------
    1.  Problem: Power consumption can be further minimized when going 
                 WOL in S1/S3/S4 states from Windows (CQ#22890).

        Cause:   The PHY auto power down is not enabled in the WOL setup
                 sequence when initiated by driver.

        Fix:     Enable the auto power down for both OOB WOL and driver-
                 initiated WOL.


    Enhancements:
    -------------
    1.  Request: A potential problem may exist if new definitions are
                 added to the reserved memory. Need to move the firmware
                 interface function table to the calling stack.

        Changes: Move the table storage to the calling stack.

        Impact:  Stack usage increases slightly.


    2.  Request: Reduce unnecessary stack usage while validating license
                 key.

        Changes: Consolidate local variable usage and eliminated the
                 unnecessary variables.

        Impact:  None.


    3.  Request: Remove MDIO support on emulation for a future chip.

        Changes: Upon emulation build, MDIO function immediately 
                 returns.

        Impact:  None to production chips, because the condition is
                 bypassed and thus MDIO access still allowed.


    4.  Request: Eliminate the unused link override option from UMP.

        Changes: The option was defined from the beginning, but it was
                 never used.

        Impact:  Skip the override condition check.


    5.  Request: Update PCI information on ctrl-alt-del.

        Changes: Added check for PCI reset condition and leverage the
                 condition to initialize PCI IDs and BAR size. Users
                 should no longer have to AC power cycle systems for
                 the new PCI information to take effect after modifying
                 the NVRAM configuration.

        Impact:  None.


Version 1.9.6 (October 05, 2006)
================================
 
    Fixes:
    ------
    1.  Problem: PXE and iSCSI boot fails to get link (5706 and 5708,
                 both C/S).

        Cause:   In the previous version, boot code picked up changes
                 from development of another chip as some modules are 
                 shared, and one of the changes inadvertently caused the 
                 boot code to reset the PHY.  That caused the link 
                 failure.

        Fix:     Temporarily removed changes. Need to add them back in 
                 a more elegant way in future revisions.


Version 1.9.5 (October 04, 2006)
================================
 
    Fixes:
    ------
    1.  Problem: Data corruption under heavy TOE traffic (CQ#26887).

        Cause:   The cause comes in two folds: (1) The BIST sequence
                 that restores the RBUF free list is flawed.  Normally, 
                 this sequence should never be executed during the 
                 loading of driver. However, the system has an extra 
                 PCIE reset during power up, and that triggers the 
                 unprepared powerdown call. As a part of that sequence, 
                 a hard reset is issued, clearing the "sticky" bit, and 
                 a special message is deposited. The execution of the 
                 BIST sequence is determined by the "sticky" bit being 
                 cleared and the absence of the special message. (2) 
                 The presence of the special message prevents the boot 
                 code from setting the "sticky" bit on the next 
                 invocation. Thus, in the following invocation, 
                 initiated by driver load, the boot code sees the 
                 "sticky" being cleared, executes the BIST sequence, 
                 and leaves behind a faulty RBUF free list.

        Fix:     (1) Corrected the BIST sequence so that the RBUF free
                 list is restored properly. (2) Upon seeing the special
                 message, the boot code sets the "sticky" bit to make 
                 sure that the BIST will not be executed anymore until
                 the next power-on reset.


Version 1.9.4 (August 30, 2006)
================================
 
    Fixes:
    ------
    1.  Problem: 5706 WOL does not work from Linux shutdown on a 
                 particular OEM system design. (CQ#26030, 5706 C/S).

        Cause:   One OEM system design has an extra deassertion in PCI 
                 reset signal as the system is shutting down from Linux. 
                 The extra deassertion restarted the boot code without 
                 re-enabling PME_ENABLE bit. As a result, the chip can
                 not propagate the PME to the system. Without the extra
                 reset, the boot code could have detected the shutdown 
                 condition and issued a hard reset that would re-enable 
                 the PME_ENABLE bit.

        Fix:     Added a workaround to detect the condition due to the
                 extra reset and force a hard reset to the chip, 
                 bringing it back to OOB state.


Version 1.9.3 (June 23, 2006)
================================
 
    Fixes:
    ------
    1.  Problem: Link does not go down when driver is unloaded
                 (CQ#23549, CQ#23795).

        Cause:   Boot code did not power down the PHY because this
                 causes the driver to crash on the next driver load.

        Fix:     Defined a new message for the driver to indicate that
                 a link brought down is desired. This will require a
                 change in the driver to take advantage of the feature.
                 Also, a change has been made to address the driver
                 crashing problem.


Version 1.9.2 (June 19, 2006)
================================

    Fixes:
    ------
    1.  Problem: WOL does not work on 5706S blade application (CQ#24292,
                 5706S only).

        Cause:   The link status is not reporting 1G link. Thus, the
                 MAC is set to MII mode instead of GMII.

        Fix:     Set to GMII mode for 5706S. That is the only operation
                 mode.


    2.  Problem: LED blinking routine does not work for some NIC design.

        Cause:   The LEDs do not blink unless the BLNK_TRAFFIC is 
                 overridden.

        Fix:     Override the BLNK_TRAFFIC in addition to the existing
                 LED override.


    3.  Problem: Windows NDIS driver locks up when enabled with PHY
                 brought down.

        Cause:   The PHY bring up did not have the correct PHY address,
                 and the presence of driver prevents boot code from 
                 touching the PHY.

        Fix:     Ensure the PHY address is correct before accessing the
                 PHY. Also, override the driver presence in this case.
                 This is okay because this occurs before the WAIT1 
                 handshake (the driver touches the PHY only after it).


    4.  Problem: WOL is consuming slightly too much power (5706C &
                 5708C) (CQ#22890).

        Cause:   The PHY DLL is not powered down.

        Fix:     Power down the PLL when auto power down is enabled.


    Enhancements:
    -------------
    1.  Request: Support new parameters in 5706S link (5706S only) (CQ
                 #24643).

        Changes: Make boot code to recognize the new parameter values
                 to continue doing auto-neg with fallback on the serdes
                 link.

        Impact:  Minimal, added another condition check.


Version 1.9.1 (May 03, 2006)
================================

    Fixes:
    ------
    1.  Problem: OOB WOL does not work on 5708 B2 silicon.
                 (5708 C/S).

        Cause:   B2 workaround is applied while no main power is 
                 present, and the registers do not are not available
                 without main power. Thus, the boot code locks up.

        Fix:     Add a condition check to apply only when main power is
                 present.


    2.  Problem: EPB locks up when OS goes to S1 (or chipset driver
                 reload) (5708 C/S) on B1 silicon.

        Cause:   The forced L1 workaround introduced in v1.7.8 did not
                 cover the S1 case.

        Fix:     Enhanced the workaround to cover this.


Version 1.9.0 (April 24, 2006)
================================

    Enhancements:
    -------------
    1.  Request: Prepare for 5708 B2 arrival (5708 C/S).

        Changes: Make sure needed workarounds also applied to B2 
                 silicons and add codes to apply ECO configuration
                 from NVRAM into the chip (B2 or later only).

        Impact:  Functionally none to silicons of previous revisions.


Version 1.8.0 (April 04, 2006)
================================

    Fixes:
    ------
    1.  Problem: OEM blade servers do not have link at power up 
                 (5708S only) (CQ#24037).

        Cause:   The PHY address used to query the link information
                 was inadvertently changed to a different value. As a 
                 result, incorrect link information was obtained. The
                 problem was introduced during boot code image split
                 (v1.7.0).

        Fix:     Re-collect the PHY address value before querying the
                 link information.


    Enhancements:
    -------------
    1.  Request: The polling of the IERR workaround (#4 in v1.7.8) may
                 need to be more frequent even under heavy management 
                 traffic (5708 C/S).

        Changes: Expose the workaround function to be accessible by
                 management firmwares, allowing them to issue the poll
                 at their convenient time.

        Impact:  Functionally none, but there are some structural changes
                 in the code.


    2.  Request: Apply the IERR workaround only for 5708 B1 silicon or
                 earlier (5708 C/S).

        Changes: Qualify the chip revision to decide whether to execute
                 the workaround code.

        Impact:  Functionally none to the existing silicon.


Version 1.7.8 (March 21, 2006)
================================

    Fixes:
    ------
    1.  Problem: Driver panic when running NTTTCP and enabling/disabling
                 driver and TOE (CQ#23178).

        Cause:   Memory parity occurs at the RBUF block.

        Fix:     Worked around by performing a few dummy reads at the 
                 RBUF memory output port before enabling parity.


    2.  Problem: There is a potential for parity error to occur in the
                 Tx Scheduler memory.

        Cause:   The output port of that memory is not cleared before
                 enabling parity.

        Fix:     A dummy read is issued to that memory block before 
                 enabling parity.


    3.  Problem: Not all the power management and budgeting information
                 for the EPB are propagated (5708 only) (CQ#23681, 23757).

        Cause:   Boot code only copies the first entry of each.

        Fix:     Make sure the entire block of information is copied.


    4.  Problem: System may lock up or generate IERR when the PCI-E 
                 interface of the 5708 attempts to transition into the 
                 L1 state (CQ#23945, CQ23864, and another facet of 
                 CQ23123).

        Cause:   The EPB (PCI-E bridge in the 5708) may miscalculate the
                 number of available flow control credits after a wrap
                 condition, and this miscalculation can lead to a case
                 where PCI-E protocol is violated and the L1 state is not
                 entered correctly.  This in turn could lead to a system
                 hang or IERR.  

        Fix:     Add a workaround will poll for certain conditions and
                 force the PCIE interface into L1 after the EPB is put
                 into D3hot.  In order for robust operation of this 
                 workaround, the entity that puts that EPB into D3hot
                 needs to honor the PCI Power management spec and wait
                 10ms after putting it into D3hot before making additional
                 accesses to the device. This workaround can be 
                 enabled/disabled based on parameters in NVRAM and shared 
                 memory.


    Enhancements:
    -------------
    1.  Request: CRC routine is removed from a library module as the
                 routine is not needed for other firmwares.

        Changes: The CRC routine is moved into another module that is
                 not shared with other firmwares.

        Impact:  Functionally none.


Version 1.7.7 (March 03, 2006)
================================

    Fixes:
    ------
    1.  Problem: WHQL ACPI stress test locks up (5708 only) (CQ#23123).

        Cause:   EPB is sending configuration completion after PCIE
                 link goes to L1 state.

        Fix:     Reconfigure the timeout to allow completion going 
                 out before going to L1 state.


Version 1.7.6 (February 10, 2006)
================================

    Fixes:
    ------
    1.  Problem: UMP firmware loses connection after Linux driver 
                 unloads (5706 only) (CQ#23207).

        Cause:   The linux gives a different driver unload message (by
                 design), and the boot code did not anticipate for it.

        Fix:     Reinitialize the link status field on when driver 
                 goes to a WOL state. The reinitialization forces the
                 boot code to update the link status.


Version 1.7.5 (February 09, 2006)
================================

    Fixes:
    ------
    1.  Problem: UMP firmware loses connection after driver unloads.

        Cause:   Boot code could not detect the link change and update
                 the EMAC mode correctly because the link status field 
                 is not initialized as the driver unloads.

        Fix:     Force to always initialize the link status field on
                 every driver-absent chip reset.


Version 1.7.4 (January 31, 2006)
================================

    Fixes:
    ------
    1.  Problem: ISCSI boot driver is intermittently failing to connect
                 (CQ#22984).

        Cause:   Boot code attempts to qualify the driver reset better,
                 but this caused a link drop on driver unload. The link 
                 drop causes iSCSI boot driver to intermittent fail to 
                 communicate with its target.

        Fix:     Fall back to original qualification.


Version 1.7.3 (January 30, 2006)
================================

    Fixes:
    ------
    1.  Problem: Windows driver is locking up when reloading driver
                 for 5708C (CQ#22950). Also, Windows encounters a 
                 hardware parity error with 5708S in BASP (CQ#22934).
                 This potentially could have effect on 5706 as well.

        Cause:   Boot code powers down the PHY/serdes from a previous
                 driver unload. The next reload causes the OS to crash.

        Fix:     Back out the fix #1 in the previous version.


Version 1.7.2 (January 25, 2006)
================================

    Fixes:
    ------
    1.  Problem: Gigabit link stays even when Linux driver is unloaded,
                 especially when management firmware is enabled.

        Cause:   Boot code failed to put the link in a low power state
                 in preparation for system power down.

        Fix:     Handle the driver unload message to bring down the link.


    2.  Problem: Vaux power consumption is higher than spec allows.
                 (CQ#22856) on some systems after Windows goes to 
                 hibernation (5708 C/S).

        Cause:   Those systems did not put the PCIE link to L2/L3, and
                 there is no PME_Turn_Off message before powering down
                 the lanes. As a result, PCIE link of the device
                 continues to draw power.

        Fix:     Set a bit in the EPB to bring it down whenever main 
                 power goes away.


Version 1.7.1 (January 16, 2006)
================================

    Fixes:
    ------
    1.  Problem: Device maintains 1G link in Vaux when "gigabit in Vaux"
                 option is disabled in NVRAM configuration (CQ#22649).

        Cause:   The boot code failed to prepare the link for Vaux state
                 when Linux driver (bnx2) is unloaded with WOL disabled.

        Fix:     Prepare the link for Vaux state (based on "gigabit in
                 Vaux" option) as the Linux driver (bnx2) is unloaded.


    2.  Problem: WOL does not work in 5708C from Linux S5 (shutdown)
                 (CQ#22585) on some systems.

        Cause:   Systems clear the PME_Enable bit on the EPB.

        Fix:     Upon seeing driver unload with WOL enabled, the boot
                 code leaves a signature in the memory and lets the chip
                 to go into unprepared powerdown. When power down occurs,
                 the boot code is triggered to reset the chip. On the 
                 next boot, the boot code sees the signature and sets up
                 WOL accordingly.


Version 1.7.0 (December 23, 2005)
================================

    Fixes:
    ------
    1.  Problem: There is a potential where the boot code could lock up
                 under a stressful environment (CQ#22043).

        Cause:   Boot code read/write accesses to various hardware 
                 resources were not properly synchronized, resulting in 
                 a potential lockup on subsequent local memory access.

        Fix:     Modified the boot code to use synchronization macros
                 for specific read/write access.


    2.  Problem: BACS is not allowing the connection resource setting
                 on systems from an OEM (CQ#22463).

        Cause:   The boot code did not take the hardware key into 
                 consideration when validating the license information,
                 misguiding the upper application into thinking that
                 no valid license is found.

        Fix:     Check for hardware key presence when validating the
                 license information.


    3.  Problem: One chip locks up a bench system when diagnostic
                 software tries to access it. This is seen on 5708C, but
                 it is possible for 5706C/S and 5708S as well (CQ#22673).

        Cause:   The boot code read an un-initialized memory location
                 that may have a value meaningful to the boot code, and
                 the boot code inadvertently acts on it. Particularly,
                 the boot code disables the chip's core clock. As a 
                 result, software may access registers that no longer
                 have clock; hence, the system locks up. 

        Fix:     Acknowledge the uninitialized value but no action is 
                 performd.


    Enhancements:
    -------------
    1.  Request: Support universal license key for an OEM.

        Changes: Modified the license validation scheme slightly when
                 this OEM's ID is recognized.

        Impact:  This relies on the phony MAC address field in the
                 license block of the NVRAM to have a fixed value.


Version 1.6.0 (December 13, 2005)
================================

    Enhancements:
    -------------
    1.  Request: Boot code image splits up into four (5706C/S, 5708C/S).

        Changes: Modified build process and put conditional compilation
                 directives into the code base.

        Impact:  This should trim down the code size by some margin.


Version 1.5.3 (December 08, 2005)
================================

    Enhancements:
    -------------
    1.  Request: Enable B1 fixes.

        Changes: Turn on a few bits in the gp_hw_ctl0 register in the
                 phase one boot code to enable fixes.

        Impact:  This should only affects the B1, as the change is 
                 qualified with 5708 B1 silicon only.


Version 1.5.2 (December 06, 2005)
================================

    Fixes:
    ------
    1.  Problem: IPMI stops pinging after Linux driver unloads 
                 (CQ#22168).

        Cause:   While Linux driver is being unloaded, the boot code 
                 needs to take the RXP and loads its version to keep
                 the Rx path alive.

        Fix:     Load RXP firmware when driver going to WOL state and
                 when management firmware is enabled.


    Enhancements:
    -------------
    1.  Request: Prepare for 5708 B1 arrival. Need to ensure all 
                 applicable workarounds are still in effect for B1.

        Changes: Updated the Tx signal amplitude workaround to apply on
                 B1 silicon. Keep the serdes workaround for CQ#TO1005 
                 applicable for B1 as well.

        Impact:  None.


Version 1.5.1 (November 11, 2005)
================================

    Fixes:
    ------
    1.  Problem: WOL does not work in Linux (CQ#TO00001970).

        Cause:   While Linux driver is unloaded, the boot code took over
                 the PHY and overrode the 10/100 setting done by the
                 driver. This causes the mismatch in PHY speed and the
                 EMAC mode.

        Fix:     Assume the driver still present until power management
                 message is received from the driver.


    2.  Problem: Some LOMs failed in CPU test due to its preceeding CTX
                 memory tests.

        Cause:   A memory parity error in CTX memory was generated, and
                 the logic block must be enabled before turning on the
                 parity check (CQ#TO00001975).

        Fix:     Enable context block of the logic before enabling the
                 memory parity check in the context memory.


    3.  Problem: 5708S does not show correct link from the LEDs, and WOL
                 does not work (CQ#TO00002054).

        Cause:   The second problem has to do with the link partner
                 being set to forced 1G speed while our device has 
                 auto-neg enabled. In this case, the boot code assumed 
                 link being down when anto-neg is not complete. The
                 first problem is due to the link status not being 
                 updated when neither WOL nor management firmware is 
                 enabled. 

        Fix:     Poll link speed information from serdes_1000x_status1 
                 register instead of phy_ctrl register. Also, link status
                 is updated whenever LED workaround is executed.


Version 1.5.0 (October 13, 2005)
================================

    Fixes:
    ------
    1.  Problem: Chips are not operating at their optimal voltages,
                 according to DVT.

        Cause:   5708 B0 chip has voltage centered a bit too low.
                 (CQ#TO00001685, CQ#TO00001744).

        Fix:     Raised the voltage on both 2.5V and 1.2V regulators.


    2.  Problem: 100 Mbps is established initially in Vaux mode even 
                 though 1G is allowed.

        Cause:   The PHY initialization routine ignores the attribute
                 of allow 1G link in Vaux mode.

        Fix:     Postponed the link establishment to a later stage where
                 the 1G link attribute is taken into consideration.


    3.  Problem: The number of licensed connections are not updated after
                 license upgrade, followed by reboot (CQ#TO00001902).

        Cause:   The driver is not sending pulses in time, and the boot
                 code thinks the driver has gone away. Thus, the license
                 information is destroyed. It appears that the OS timer
                 is not reliable on some systems.

        Fix:     Implemented a pulse interrupt, forcing the driver to 
                 post a pulse when timeout expires.


    4.  Problem: System fails to POST when both UMP and MBA are enabled
                 (CQ#TO00001932).

        Cause:   UMP firmware was holding the control for 5 msec on each
                 invocation, slowing down the fetching of the MBA image.
                 Thus, the system gave up POSTing.

        Fix:     The boot code marks a bit in the shared memory to
                 indicate that it is busy handling requests and ask
                 the UMP firmware to skip processing anything extensive.


    5.  Problem: 5708 has a poor layer two traffic performance on x1
                 slot of some systems (CQ#TO00001678, CQ#TO00001679,
                 CQ#TO00001786).

        Cause:   Those systems have fewer PCIE credits than anticpated.

        Fix:     Backed out the change of increasing the outstanding
                 reads at the EPB.


    6.  Problem: UMP firmware stops running on 5708A0.

        Cause:   The shared memory header signature is corrupted. The
                 boot code was dumping debug trace at unused scratchpad
                 space that is not available in 5708A0. In A0, the
                 decoded address ended up at the beginning of the
                 scratchpad.

        Fix:     Removed all debug trace dumps.


    7.  Problem: The presence of a hardware key on an OEM system causes 
                 flash corruption.

        Cause:   The boot code resets the chip after the handshake with
                 the BIOS. The BIOS may also try to access the flash at
                 the same time.

        Fix:     Removed the reset after the handshake.


    Enhancements:
    -------------
    1.  Request: Need to validate upgrade license that is programmed by
                 hardware key.

        Changes: Validation is done based on the MAC address of the 
                 hardware key.

        Impact:  None.


    2.  Request: Stop supporting 5706A0 silicon.

        Changes: Removed workarounds specific for that revision of the
                 chip.

        Impact:  Code size is reduced.


    3.  Request: Remove the timeout mechanism for the handshakes with
                 OEM's BIOS, as they may not have a good control of 
                 when the handshake will happen.

        Changes: Allow handshake only with a specific OEM.

        Impact:  The OEM BIOS must perform the handshake on boot,
                 regardless of whether the hardware key is present or
                 not.


Version 1.4.0 (September 15, 2005)
================================

    Fixes:
    ------
    1.  Problem: IPMI stops passing traffic after BNX2 driver is
                 unloaded (CQ#TO00001674).

        Cause:   The message BNX2 driver sent upon unload was not
                 considered a driver absence case. Thus, the boot code
                 did not load the RXP firmware, and no outside traffic
                 can reach IPMI firmware.

        Fix:     Boot code considers this message to indicate that the
                 driver absence case.


    2.  Problem: Link may momentarily come up at 100Mbps even though 1G
                 link is allowed.

        Cause:   The boot code did not take the "allow 1G link in Vaux"
                 configuration parameter into consideration until at the 
                 servicing loop.

        Fix:     Boot code supports this configuration parameter at the
                 beginning.


    3.  Problem: 5706S link cannot fallback to forced link in Vaux mode, 
                 even though NVRAM has been configured to allow gigabit 
                 link (CQ#TO00001791).

        Cause:   The absence of the management firmware causes the boot
                 code to halt, stopping the support of link fallback.

        Fix:     Allow boot code to continue running in the serdes case.


    Enhancements:
    -------------
    1.  Request: UMP firmware specification changes to definition of
                 some link related status codes.

        Changes: Redefined the status codes and updated the return 
                 codes in the link related routines.

        Impact:  None.


    2.  Request: Include hardware license key support.

        Changes: Perform handshakes with OEM BIOS (still in development
                 stage).

        Impact:  Added more command handling in the servicing loop.


    3.  Request: Enforce license in terms of 2.5G link.

        Changes: Verify the license for 2.5G ability and constantly
                 monitor the 2.5G link when that speed is not allowed.

        Impact:  If 2.5G link is enabled while the license does not
                 allow, the link will be dropped, rather than falling
                 back to 1G.


Version 1.3.4 (August 19, 2005)
================================

    Fixes:
    ------
    1.  Problem: iSCSI HBA uses iSCSI boot information even though 
                 iSCSI boot is not enabled (CQ#TO00001604).

        Cause:   Residue information remains in the memory from a 
                 previous boot during which iSCSI boot was enabled.

        Fix:     Boot code comes in to destroy the content on PCI/E
                 reset.


    2.  Problem: Intermittent data corruption on the first received
                 packet found in 5708B0 (CQ#TO00001612, CQ#TO00001577).

        Cause:   There is a timing issue either in PCI of the NIC or
                 the EPB.

        Fix:     Bump up the 1.2V regulator operating value to work
                 around the timing issue.


    3.  Problem: Rapid shutdown does not work.

        Cause:   The boot code sets up the EPB for unprepared powerdown
                 only after the fact. This causes the CPU to stall 
                 inside the ISR.

        Fix:     Move the EPB setup to an earlier stage (while
                 registering interrupt for the rapid shutdown) to fix
                 the original problem, but this feature is temporarily
                 disabled.


    4.  Problem: S5 WOL on 5708B0 does not work (CQ#TO00001583).

        Cause:   The notion of main power present bit is not a true 
                 indication. Thus, the boot code ends up performing a
                 prepared power down (as if this is an S1 or S4) instead
                 of allowing the external circuit to create the power
                 gap to recreate the OOB case.

        Fix:     Drive GPIO2 only in Vaux mode. Make sure the unprepared
                 powerdown case to have either a power gap from external
                 circuit or a hard reset issued by boot code. This will
                 recreate the WOL setup in Vaux mode.


Version 1.3.3 (August 10, 2005)
================================

    Fixes:
    ------
    1.  Problem: 5706S does not establish with link partner that can
                 only have a forced speed (CQ#TO00001351).

        Cause:   Fallback mechanism is not implemented.

        Fix:     Implement the autoneg with fallback.


    2.  Problem: 5708 PCIE lane optimization is not taken effect in
                 some systems.

        Cause:   Multiple PCIE resets restore the chip default and
                 wipe out the optimization value.

        Fix:     Program the value on every chip reset when PCIE power
                 is available.


    3.  Problem: The WOL for 5706S/08S does not work (CQ#TO00001563).

        Cause:   The EMAC mode is incorrectly set to MII, rather than
                 GMII.

        Fix:     Poll the link status to program the EMAC mode 
                 accordingly.


    4.  Problem: The unprepared power down may still consume more power
                 than anticipated.

        Cause:   The EPB was not shut down upon seeing the unprepared
                 power down event.

        Fix:     Power down EPB upon seeing the event.


    5.  Problem: The LEDs in 5708S A0 and B0 do not behave correctly.

        Cause:   This is a chip issue.

        Fix:     Boot code has a runtime workaround to constantly 
                 monitor for the link state and updates the LEDs 
                 accordingly.


    Enhancements:
    -------------
    1.  Request: OEMs do not want to lose link for too long due to 
                 auto-neg for in the serdes.

        Changes: Defined a configuration parameter to keep at a forced
                 speed and have boot code to honor it.

        Impact:  When set to a forced speed, the serdes cannot perform
                 auto-neg.


    2.  Request: Take advantage of the extra scratchpad space in 5708
                 B0. Need the relocate the shared memory dynamically.

        Changes: Defined a header at the beginning of the scratchpad
                 to tell drivers where the shared memory is located.

        Impact:  The phase one boot code starts its execution at a 
                 different location (moved down by 0x10 bytes).


Version 1.3.2 (July 28, 2005)
================================

    Fixes:
    ------
    1.  Problem: DVT could not completely verify the 5708B0 fix on Vaux
                 over-current at L2Rdy transition.

        Cause:   Chip detected power going down, triggering an interrupt
                 (setup by the boot code) to issue a hard reset. This
                 happens even on emulated graceful powerdown.

        Fix:     Boot code to disable the interrupt while preparing for
                 graceful power down.


    2.  Problem: The PCIE performance workaround for 5708A0 errata 1.21
                 has not taken an effect.

        Cause:   This can occur if a warm reboot (ctrl-alt-del) is
                 issued instead of power cycle after boot code upgrade.
                 The code checks for POR, if qualified, will skip the
                 check for the need to apply workaround.

        Fix:     Remove the dependency of skipping.


    3.  Problem: BMC behind the management firmware cannot respond to 
                 ping (CQ#TO00001542).

        Cause:   The boot code failed to crank up the clock, allowing 
                 packets to go through. This was inadvertently 
                 introduced while adding the "gigabit link in Vaux"
                 configuration bit.

        Fix:     Skip checking on the configuration bit when qualifying
                 for the need to crank up the clock.


    4.  Problem: Management firmware fails to run on 5708S 
                 (CQ#TO00001530).

        Cause:   Boot code used an unavailable clock source (125MHz,
                 specific only to 5708S) as a transition source to 
                 "crank up" the clock.

        Fix:     Changed to use the available clock source (25MHz).


Version 1.3.1 (July 25, 2005)
================================

    Fixes:
    ------
    1.  Problem: The PCI-E performance is not optimal on x4 operations
                 and is unacceptable low when operating using one lane
                 (5708A0 errata 1.21).

        Cause:   The default PCI-E setting for the number of outstanding
                 requests is too few.

        Fix:     Regardless of the number of lanes, added a workaround 
                 to increase the outstanding request number from four to
                 eight and to change the read/write arbitration as 
                 round-robin.


    2.  Problem: MBA banner fails after enabling MBA in xdiag, followed
                 by a warm reboot (ctrl-alt-del) (CQ#TO00001515).

        Cause:   The MBA advertisement is updated only on power-on 
                 reset (POR).

        Fix:     Update the MBA advertisement on every reset, while
                 preserving the PCI BAR size until POR.


    3.  Problem: Management firmware did not receive all the packets
                 it needs. Thus, IPMI-PT was failing in handling 
                 DHCP.

        Cause:   The receive rules were not programmed correctly 
                 according to the hardware design.

        Fix:     The RXP firmware supports a new software bit for the
                 management firmware.


    Enhancements:
    -------------
    1.  Request: Some LOM designs do not want to allow gigabit link
                 in Vaux mode while they want management firmware 
                 support (CQ#TO00001494).

        Changes: Defined another configuration bit in NVRAM to allow
                 drawing even more Vaux power to support gigabit link.

        Impact:  This requires xdiag (v1.1.3) to support NVRAM 
                 configuration for the additional bit.


Version 1.3.0 (July 12, 2005)
================================

    Fixes:
    ------
    1.  Problem: Linux driver fails to load (CQ#TO00001463).

        Cause:   Boot code zero out the device information signature
                 temporarily during initialization, confusing the driver
                 into thinking that the boot code being dead.

        Fix:     Preserve the device information signature while only 
                 clearing out the initialization stage indication.
                 

    2.  Problem: 5708S may have a slightly higher bit error rate (errata
                 1.75, CQ#TO00001486).

        Cause:   The serdes did not have the correct default on the Tx
                 peak-to-peak amplitude value.

        Fix:     Boot code programs the serdes to have the correct value
                 as the workaround.


    3.  Problem: UMP firmware is not responding to 80-byte ping packet
                 when the chip comes up on power-on-reset 
                 (CQ#TO00001483).

        Cause:   The RBUF is corrupted due the free pointer list being
                 zero'd out by the boot code for enabling parity check.

        Fix:     Restore the free pointer list after zero'ing out the 
                 memory.


    Enhancements:
    -------------
    1.  Request: Support new features in 5708 B0.

        Changes: Added device serial number, PCI-E power budgeting, 
                 and power consumption/dissipation of the EPB. Implement
                 an interrupt handler to take care of the unprepared
                 powerdown case. 

        Impact:  Code size change and a hard (POR) reset will occur
                 on unprepared powerdown, but this hard reset does
                 not trigger any memory clearing.


Version 1.2.0 (June 21, 2005)
================================

    Fixes:
    ------
    1.  Problem: The BAR size is not properly programmed on 5708 B0
                 FPGA (CQ#TO00001392).

        Cause:   The boot code is stalled due to an advertent access
                 to the EPB while no PCI power is present (misled by
                 the FPGA signal).

        Fix:     Qualify the access to EPB on non-FPGA. Also, use one
                 sticky bit to indicate whether BAR has been programmed
                 or not to perform this only once.
                 

    2.  Problem: The LED blink does not stop as intended and does not
                 blink fast as intended.

        Cause:   The code fails to mask out the signature value and the
                 fast blink flag. As a result, it treats the value and 
                 the flag as part of the number of blinks to perform.

        Fix:     Correctly mask the signature and the flag.


    3.  Problem: The management firmware may not be able to keep up the
                 management traffic when OS going to a power managed 
                 state.

        Cause:   The boot code puts the chip to run at a slower speed
                 rather than leaving it at full speed when driver
                 requests the chip going to a power managed state.

        Fix:     Check if the hardware allows it, and if so, make sure
                 the chip running at full speed.


    Enhancements:
    -------------
    1.  Request: 5708 A0 errata 1.5 workaround is not needed, as this
                 is already the default behavior of the chip. Also,
                 the A0 workaround should be limited to A0 only.

        Changes: Removed errata 1.5 workaround and qualify the work-
                 around only on 5708 A0.

        Impact:  Small logic change.


    2.  Request: Merge licensing feature back.

        Changes: Include the flag to compile this feature on build.

        Impact:  Code size grows significantly but still can co-exist
                 with management firmware.


    3.  Request: Add a runtime check for stack overflow.

        Changes: Deposit a signature at the end of the management 
                 firmware code and check for existence of the signature
                 periodically.

        Impact:  Introduced a small overhead on checking before handing
                 control to management firmware.


Version 1.1.6 (June 17, 2005)
================================

    Fixes:
    ------
    1.  Problem: 5708S does not have a link when running management
                 firmware in OS absent mode.

        Cause:   The link status routine is reporting incorrect result.

        Fix:     Added a check to collect correct PHY register values
                 on SerDes.


Version 1.1.5 (June 09, 2005)
================================

    Fixes:
    ------
    1.  Problem: IPMI-PT firmware cannot pass traffic.

        Cause:   Certain state machines within the chip are not enabled.

        Fix:     Enable necessary blocks once management firmware is
                 successfully loaded.


    2.  Problem: IPMI-PT firmware cannot pass traffic when Windows
                 driver is loaded.

        Cause:   The current driver does not update the link status,
                 thus IPMI-PT firmware thinks the link being down.

        Fix:     Work around it by looking at the EMAC block for the 
                 link status, even when driver is loaded.


Version 1.1.4 (June 08, 2005)
================================

    Fixes:
    ------
    1.  Problem: BAR size is not programmed properly on 5708 B0
                 FPGA (CQ#TO00001392).

        Cause:   The BAR size register appears to be not writeable
                 when no PCI power available.

        Fix:     Check if it is programmed on every reset that has
                 PCI power. If not already programmed, do so.


    2.  Problem: Boot code blinks LEDs to error driver absence condition
                 when Windows goes to S1.

        Cause:   The driver stops sending pulses due to S1 and is 
                 treated as driver being dead.

        Fix:     Check for pulses only when driver is stil considered
                 present.


    Enhancements:
    -------------
    1.  Request: Need to add 2.5G autoneg support.

        Changes: Added the routine to support 2.5G. Fixed to skip 
                 writing to CSMA_CD bits in autoneg for serdes. Added
                 a check on NVRAM configuration and set link detection
                 accordingly.

        Impact:  Phase one of the boot code grew.


    2.  Request: Support link setting in the absence of driver.

        Changes: Implemented a routine used by boot code and management
                 firmware.

        Impact:  Phase two of the boot code grew considerably.


Version 1.1.3 (May 24, 2005)
================================

    Fixes:
    ------
    1.  Problem: Firmware stops running after removing management
                 firmware images, followed by chip reset 
                 (CQ#TO00001343).

        Cause:   Boot code transfer control to the management firmware
                 without checking whether the loading of the firmware
                 was successful or not.

        Fix:     Check for successful load before handing off control.


    2.  Problem: UMP/IMD firmware experiences underruns at the UMP TX 
                 port.

        Cause:   The chip is operating at a slower speed in Vaux mode
                 than the TX UMP port.

        Fix:     Added codes to crank up the clock rate in Vaux when
                 NVRAM configuration allows so.


    Enhancements:
    -------------
    1.  Request: Embed RXP firmware into the image.

        Changes: Modify the Makefile to include this project.

        Impact:  Require a slightly larger flash size for applications
                 that do not require management firmware. May be an
                 issue in terms of BOM cost.


    2.  Request: Select to execute IPMI firmware when a configured GPIO
                 is driven high.

        Changes: Remove a bit lookup in the NVRAM to determine what a 
                 GPIO driven means and always assume high meaning to 
                 load IPMI.

        Impact:  Simplify the boot code in the checking logic.


Version 1.1.2 (May 06, 2005)
================================

    Fixes:
    ------
    1.  Problem: Parity error may occur on 5708S.

        Cause:   Boot code miscompares the chip revision ID by including 
                 the media type bit (serdes has that bit set) and 
                 inadvertently enables parity of certain blocks of 
                 memory.

        Fix:     Mask off the media type bit before checking on the chip 
                 revision.


    2.  Problem: Scratchpad space on MCP running low.

        Cause:   Boot code co-exists with management firmware. The
                 management firmware needs more scratchapd space.

        Fix:     Temporarily eliminated the licensing feature.


    Enhancements:
    -------------
    1.  Request: Add management firmware support integration.

        Changes: Support the management firmware dispatching routine,
                 allowing both entities to pass CPU control back and
                 forth. Also, provide a set of utility functions for
                 the management firmware. The link related utility
                 feature is limited to get_link on copper only.

        Impact:  The management support is time-sharing the CPU with 
                 other services that the boot code currently support.


    2.  Request: Need to statically assign the pre-emphasis and idriver
                 values on backplane application.

        Changes: Program the TxCtrl3 register in the serdes with a 
                 static value stored in the NVRAM.

        Impact:  None.


Version 1.0.5 (April 29, 2005)
================================

    Fixes:
    ------
    1.  Problem: TPAT Cracker test fails with memory parity error on
                 chip made by SS manufacturing process (CQ#TO00001276).

        Cause:   Asynchronous reset may have caused the read ports of 
                 both RV2P instruction RAMs to have parity error.

        Fix:     Perform reads from both RAMs to flush out the error
                 before enabling RV2P processors.


    2.  Problem: DVT ran into various CPU scratchpad parity problems
                 when testing certain chips in different temparature and
                 voltage.

        Cause:   The memory blocks on the scratchpads and UMP FIORX are 
                 not meeting the timing.

        Fix:     Disable parity check on these blocks for 5706 and A0 of 
                 5708.


    3.  Problem: Phase two boot code may not be loaded on some boards.

        Cause:   There is an empty entry preceeding the phase two entry
                 in the NVRAM directory structure.

        Fix:     Check on the length field to skip the empty entry.


Version 1.0.4 (April 05, 2005)
================================

    Fixes:
    ------
    1.  Problem: Boot code stalls running FPGA.

        Cause:   The boot code attempts to zero out memory using BIST, 
                 which is not supported on FPGA.

        Fix:     Bypass the zeroing out memory and skip memory parity 
                 check.


    2.  Problem: Boot code fails to load phase two.

        Cause:   Both phases of the codes are running on the same
                 location, clobbering each other.

        Fix:     Moved phase one code to the beginning of the 
                 scratchpad


Version 1.0.3 (March 29, 2005)
================================

    Enhancements:
    -------------
    1.  Request: Move the stack in anticipation for management firmware
                 integration.

        Changes: Shuffle the locations of both phases of the boot code
                 within the MCP scratchpad.

        Impact:  None.


    2.  Request: Support Atmel 2Mb part for 5708 B0.

        Changes: Detect the new external flash strapping.

        Impact:  None - the existing strapping remains compatible.


Version 1.0.2 (February 24, 2005)
================================

    Fixes:
    ------
    1.  Problem: OOB WOL does not work on 5708C (CQ#TO00000987).

        Cause:   There was an EPB access in Vaux mode, causing the
                 boot code to hang and not being able to configure
                 for WOL.

        Fix:     Check for presence of the main power before touching
                 any EPB registers.


    Enhancements:
    -------------
    1.  Request: Support 5708S link.

        Changes: Added MDIO access to 5708 Serdes to enable auto-neg
                 and parallel detection.

        Impact:  None.


Version 1.0.1 (February 11, 2005)
================================

    Fixes:
    ------
    1.  Problem: Diagnostic test fails intermittently on some chips.

        Cause:   A memory parity error was found in register file of
                 COM CPU.

        Fix:     Disable parity check on all CPU register files.


Version 1.0.0 (January 18, 2005)
================================

    Enhancements:
    -------------
    1.  Request: The phase one bootcode grows beyond the bound. A new
                 firmware start address needs to adjust to accommodate
                 this.

        Changes: Changed the start address from 0x6c00 to 0x6800.

        Impact:  Due to the way two phases of bootcodes are loaded, 
                 this may limit the overall size of the phase two 
                 bootcode when combined with management 
                 functionalities.


    2.  Request: 5708 A0 silicon needs workaround address the chip
                 errata.

        Changes: Added workarounds and added routines to access the
                 EPB block.

        Impact:  Code size increases.


    3.  Request: Need to disable beacon in WOL for 5708.

        Changes: Added the support to disable beacon when configured 
                 so.

        Impact:  None.


    4.  Request: The link status on 5706S is not reliable, A2 provides
                 a way to route SIGDET from PHY to the link status, but
                 software is still needed to activate it.

        Changes: Added the workaround to route this pin to link status
                 bit.

        Impact:  None.


    5.  Request: Enhance the robustness of determining the need for
                 a chip hard reset to simulate a cold WOL.

        Changes: Add another condition check for ungraceful system 
                 power down by checking on the PCI power state (making
                 sure it is in D0).

        Impact:  None.


    Fixes:
    ------
    1.  Problem: PHY register values may be read incorrectly, but no
                 failure has occurred yet.

        Cause:   The MDIO interface has the START_DONE bit cleared a
                 few clock cycles too sooner before the data is
                 actually available.

        Fix:     Work around it by re-reading the mdio register after
                 detecting the "completion".


    2.  Problem: Memory parity problem with 5708.

        Cause:   Some of the internal memory blocks in 5708 are 
                 slightly different in sizes. Thus, the BIST sequence
                 to zero out memory needs to be different as well.

        Fix:     Included the new sequence to zero out memory for 5708.


    3.  Problem: MSI may not be disabled for 5706 A0 & A1, which are
                 known to have problems on those revisions.

        Cause:   The MSI capability register was assigned before the
                 check to disable MSI.

        Fix:     Check the chip rev to disable the MSI and then assign
                 to the capability register.


Version 0.3.9 (November 11, 2004)
==============================

    Enhancements:
    -------------
    1.  Request: Enable memory parity.

        Changes: Zero out most of the memory blocks when main power is
                 available for the first time.

        Impact:  This may be an issue with management firmware that 
                 keeps states, as their states will be destroyed.


    Fixes:
    ------
    1.  Problem: MSI logic cannot be supported (CQ#TO00000545,
                 CQ#TO00000582).

        Cause:   A1 silicon has bugs in the MSI interface in both DMAE 
                 and HC blocks.

        Fix:     Disable MSI support for A0 and A1.


Version 0.3.8 (October 07, 2004)
==============================

    Fixes:
    ------
    1.  Problem: Link is still up after the driver is unloaded with
                 no WOL or management firmware enabled (CQ#TO00000611).

        Cause:   When driver is marked as present, the PHY access
                 routine does not allow bootcode from updating any PHY
                 registers. In this case, the bootcode attempts to power
                 down the PHY before marking the driver absent. Thus, 
                 the PHY is not brought down.

        Fix:     Update the driver presence state before powering down
                 the PHY.


    2.  Problem: System wakes up with magic packets even though the 
                 driver disables the chip (CQ#TO00000628).

        Cause:   On receiving NO_WOL request from the driver, the
                 bootcode did not drive GPIO2 to low to draw power from 
                 Vaux. When the main power is brought down, the 
                 external circuit triggers a power on reset. If the NVM
                 is configured to have WOL enabled, the link will be
                 re-established, and the system will be back to cold
                 WOL case.

        Fix:     On receiving WOL or NO_WOL request, the bootcode will
                 drive GPIO2 to low to turn off the power-on-reset
                 effect on the external circuit.


Version 0.3.7 (October 01, 2004)
==============================

    Enhancements:
    -------------
    1.  Request: BMAPI wants the current effective license key info
                 available.

        Changes: Provide a driver command to copy the effective license
                 information from the shared memory used by firmware to
                 the shared memory consumed by the driver.

        Impact:  None.


    2.  Request: Need a dedicated bit to indicate the presence of 
                 driver.

        Changes: Reserve one bit in shared memory for this. Mark the
                 driver present condition appropriately throughout the
                 bootcode.

        Impact:  This relieves the reset_type info to be retained 
                 throughout the bootcode life cycle (between two con-
                 secutive chip resets).


    Fixes:
    ------
    1.  Problem: Linux driver load/unload test fails intermittently
                 (CQ#TO00000583).

        Cause:   Bootcode did not put down the shared memory signature
                 in time (failed to do so in phase one bootcode).

        Fix:     Always put the shared memory signature in phase one.


    2.  Problem: Bootcode does not validate license key.

        Cause:   The order of checking (new validation command vs. 
                 validation completion) is reverse, resulting in the
                 bootcode keeps trying to validate key and skips the
                 completion check.

        Fix:     Reverse the order of the two actions.


    3.  Problem: VPD reports incorrect data.

        Cause:   The bootcode adds the VPD address twice while
                 translating it into NVM address.

        Fix:     Removed the redundant add during address translation.


    4.  Problem: WOL does not have a link even if driver is configured
                 to be enabled.

        Cause:   This happens when WOL is configured to be disabled in
                 the NVM. The bootcode incorrectly marks the reset_type 
                 while processing WOL request from driver. As a result, 
                 when main power is down, the bootcode lost track of the 
                 driver WOL request, and simply follow the NVM config
                 to disconnect the power altogether. 

        Fix:     Eliminated the erroneous marking of the reset_type.


    5.  Problem: Link is still up after the driver is unloaded with
                 no WOL or management firmware enabled (CQ#TO00000611).

        Cause:   The power to the PHY stays on.

        Fix:     Power down the PHY when the driver is unloaded with
                 the intent of disabling WOL; at the same time, no
                 management firmware is running.


    6.  Problem: Linux driver cannot load up (insmod) after being
                 brought down with WOL enabled by the driver.

        Cause:   The driver brought the chip down to D3. Upon "insmod",
                 the chip is brought back up to D0, and it appears that
                 another core reset occurs.  On every reset, the 
                 bootcode destroys that signature and restore it after 
                 some device info is initialized.  Since this is not an 
                 explicit reset, the driver does not perform any 
                 handshake with the bootcode and reads the value just 
                 before the bootcode restores it.

        Fix:     The bootcode checks for the presence of the valid 
                 device info signature. If present, do not destroy it,
                 assuming the actual device info is still intact.


Version 0.3.6 (August 27, 2004)
==============================

    Enhancements:
    -------------
    1.  Request: Link status field to be updated by driver.

        Changes: Bootcode initializes it to zero when driver is
                 not present.

        Impact:  None.


    2.  Request: As a side effect from the fix in CQ#TO00000134, the
                 chip adds a delay to wait for the ATMEL flash to come
                 out of reset. This potentially can cause the driver
                 to fail meeting the loading time requirement. As a
                 workaround, the delay only takes effect on POR,
                 relying on the bootcode to write a non-zero value to
                 the stick byte in a MISC block register.

        Changes: Bootcode writes a non-zero value to allow the next
                 chip reset to skip the delay.

        Impact:  None.


    3.  Request: Management firmware needs to know whether or not the
                 reset is due to POR.

        Changes: Bootcode detects the condition and propagates the 
                 information to management firmware.

        Impact:  None.


    4.  Request: Licensing for L4 and L5.

        Changes: Add a license key validation function.

        Impact:  Requires more time before management firmware can start.


    5.  Request: Linux driver wants to override NVM's WOL setting on 
                 shutdown/suspend.

        Changes: Support a new driver reset reason code to accommodate
                 this override. Add more logic to determine when to 
                 shut off the power to the chip.

        Impact:  None.


    6.  Request: Driver may not want to tell firmware to apply any
                 workaround.

        Changes: Make WAIT2 state on driver-firmware communcation 
                 optional.

        Impact:  Potentially get bootcode to run servicing loop sooner.


    7.  Request: The PLL designer suggests to operate the PLL with 
                 USE_SPD_DET bit set for non-5706A0 silicons. Otherwise,
                 it may cause the VCO in the PLL to operate outside of
                 its desired range. No problem has been found, but the
                 unnecessary risk should be eliminated.

        Changes: Set the USE_SPD_DET bit in the clock control register
                 at the beginning of the bootcode.

        Impact:  None.


    Fixes:
    ------
    1.  Problem: 5706 A1 silicon may experience PCI bus lockup.

        Cause:   Bootcode unconditionally turn off the PLL.

        Fix:     Added a qualifier to turn off PLL only for 5706 A0
                 silicon.

    2.  Problem: Driver cannot access the chip after when running 
                 debugger.

        Cause:   Upon detecting the driver's DIAG reset, the bootcode
                 sets the playdead bit, disabling the chip.

        Fix:     Remove the setting of the playdead bit and simply halt
                 the bootcode execution.


    3.  Problem: FPGA board fails on MAC address change test script of
                 the WHQL test (CQ#TO00000393).

        Cause:   Due to the FPGA running slower, the driver times out
                 when communicating with the bootcode, causing a 
                 FW_TIMEOUT event. The bootcode fails to handle this
                 gracefully and proceeds to updates the MAC address
                 that is programmed in the NVM. This happens after the
                 driver updates with a new MAC address. As a result,
                 the test script sees the incorrect MAC address, 
                 updated by bootcode.

        Fix:     Handle the FW_TIMEOUT by skipping all hardware 
                 initialization.


    4.  Problem: The playdead mode cannot achieve the power consumption
                 below 20mA.

        Cause:   Certain IP blocks (e.g. SerDes needs to keep a 25MHz
                 clock running in order for it to wake up from PCI 
                 reset) require more power consumption.

        Fix:     Keep the external circuit and rely on bootcode to 
                 toggle GPIO1 to disconnect power from the chip.


    5.  Problem: None, but SerDes chip may experience problems at the
                 PHY level.

        Cause:   The workaround to reduce BER was targeted for copper
                 PHY only, but the workaround inadvertently applies to 
                 SerDes as well.

        Fix:     Check for copper PHY before applying the workaround.


    6.  Problem: The default values of MAX_CUMULATIVE_SIZE, 
                 MAX_SPLIT_SIZE, and MAX_MEM_READ fields in pcix_status
                 are incorrect (CQ#TO00000443).

        Cause:   These fields between pcix_status and id_val4 registers 
                 are swapped in the RTL.

        Fix:     The bootcode works around the field swapping problem to
                 restore the correct default values.


    7.  Problem: Potentially, MBA may not get the correct configuration 
                 to select the correct boot agent.

        Cause:   The configuration information is not available until
                 phase two bootcode runs.

        Fix:     Provide the MBA config info and iSCSI MAC address in
                 phase one.


Version 0.3.5 (June 03, 2004)
==============================

    Enhancements:
    -------------
    1.  Request: Program the LED mode regardless of the driver presence.

        Changes: Moved the codes out of the driver presence check.

        Impact:  None.


    Fixes:
    ------
    1.  Problem: WoL does not wake up on multicast address 
                 (CQ#TO00000328).

        Cause:   The sort user mode did not allow multicast address to
                 through.

        Fix:     Enable accepting multicast address.


    2.  Problem: WoL falsely wake up on packets with all 0's pattern 
                 (CQ#TO00000334).

        Cause:   Only the first perfect match filter is programmed with
                 the primary MAC address. The rest of them are left with
                 all 0's. Thus, the chip matches the zero pattern and
                 assert the PME and wake up the system.

        Fix:     Program the other filters with the primary MAC address.


Version 0.3.4 (May 18, 2004)
==============================

    Enhancements:
    -------------
    1.  Request: Support cold WOL.

        Changes: Added codes for power management and magic packet
                 detection setup.

        Impact:  None.


    2.  Request: Load RXP firmware and include RBUF workaround when mgmt
                 firmware is enabled.

        Changes: Added codes to load firmware from NVM.

        Impact:  None.


    3.  Request: Service expansion ROM even if it is not advertised to
                 work around any BIOS that unconditionally asks for the
                 data.

        Changes: Enable EXP_ROM FIO event.

        Impact:  None.


    4.  Request: Avoid programming bad PCI IDs, thus, allowing the device 
                 to be seen by the system.

        Changes: Check the content of NVM before programming the IDs.

        Impact:  May mislead users that NVM content is okay even if it is
                 not. May also report a different device (copper when it 
                 is really a fiber).


    5.  Request: Check for the EMAC port mode in case if there is a
                 change in link speed when running mgmt firmware in Vaux.

        Changes: Without the presence of driver, constantly poll the PHY 
                 link and adjust the EMAC port mode accordingly when mgmt
                 firmware is present.

        Impact:  More checking in the main service loop.


    Fixes:
    ------
    1.  Problem: PME status gets cleared without OS involved.

        Cause:   GPIO2 is not driven low. The transition from Vaux to
                 Vmain may cause the chip to lose power completely, thus,
                 triggering a power-on reset (POR). The POR clears the
                 PME status bit.

        Fix:     Always drive GPIO2 to low when going to low power mode.
                 This stablizes the chip power drawn from Vaux.


    2.  Problem: The bit error rate (BER) may be high.

        Cause:   The default PHY setting is incorrect.

        Fix:     Added a seqence of PHY register commands to reduce BER.


    3.  Problem: MAC address in the shared memory may not be programmed 
                 properly phase one. This problem may not be observable
                 because the shared memory is updated correctly in a
                 later stage (phase two).

        Cause:   The variable assignment is incorrect.

        Fix:     Correct the variable assignment.


    4.  Problem: Bootcode misses commands from the driver, misleading
                 the driver to think that bootcode is not present. The
                 issue manifests itself in its failure to wake up from
                 Windows shutdown.

        Cause:   The bootcode does not wait for a specific driver command
                 and sometimes blindly acks a command before the driver
                 deposits a new one. Sometimes the processing takes too 
                 long, thus, the driver times out on waiting.

        Fix:     Reorganized the driver command handler and the bootcode
                 sequence to wait for specific commands. Reduced the
                 delays when manipulating clock register for low power
                 mode.


Version 0.3.3 (April 15, 2004)
==============================

    Enhancements:
    -------------
    1.  Request: Support Saifun flash parts.

        Changes: Added codes to recognize the remap of flash strapping.

        Impact:  None.


    2.  Request: Add ASYM pause capability in auto-negotiation.

        Changes: Set the asymmetic pause capability bit in a PHY 
                 register.

        Impact:  None.


    3.  Request: Support fiber boards.

        Changes: Skip initializing fiber NIC PHY in auxiliary power 
                 mode.

        Impact:  None.


Version 0.3.2 (March 31, 2004)
==============================

    Fixes:
    ------
    1.  Problem: Xdiag reports 001018ffffff as MAC address even if a 
                 correct one has been programmed into flash.

        Cause:   Bootcode is destroying the MAC address content in the
                 shared memory and restoring it too late, causing xdiag
                 to use the default address. This may be a problem for
                 other drivers as well (See CQ#TO00000175, TO00000179).

        Fix:     Restore MAC address and signature at a earlier stage.


    Enhancements:
    -------------
    1.  Request: The PCI Revision ID in config space needs to reflect the
                 correct chip revision.

        Changes: Propagate this information in phase one code.

        Impact:  None.


    2.  Request: Blinking LEDs may cause BIOS to abort fetching expansion
                 ROM data.

        Changes: Remove LEDs blinking from the code to speed up the 
                 execution.

        Impact:  No visual indication of bootcode execution.


Version 0.3.1 (March 27, 2004)
==============================

    Fixes:
    ------
    1.  Problem: WOL may not work when Windows going to standby/hibernate.

        Cause:   Bootcode is tricking Windows driver into thinking that
                 it will perform the power management function while it 
                 did not.

        Fix:     Perform the power management function (e.g. driving 
                 GPIO2 to low) when it receives the WAIT3 request from
                 the driver.


    2.  Problem: MBA image is not loaded when enabled (CQ#TO00000164).

        Cause:   Some BIOS request expansion ROM data that are 16-bit 
                 aligned. The chip is giving the 16-bit aligned address
                 to bootcode, causing the bootcode to retrieve wrong
                 data to the expansion ROM interface.

        Fix:     Ignore the lower two bits of the expansion ROM address.


    Enhancements:
    -------------
    1.  Request: The load and execution time of phase one bootcode
                 needs to be minimized.

        Changes: Moved the code that fetch NVM content to shared memory
                 to phase two.

        Impact:  It's functionally the same, provided user upgrade both
                 phases of the bootcode.


    2.  Request: For debugging purpose, the LEDs need to blink to 
                 indicate bootcode execution.

        Changes: Changed from five blinks to one.

        Impact:  Expansion ROM codes can be retrieved sooner with fewer
                 LED blinks.


    3.  Request: To support magic packet WOL

        Changes: Implemented some power management and support for WOL.

        Impact:  None.


Version 0.3.0 (March 10, 2004)
==============================

    Fixes:
    ------
    1.  Problem: Less optimal voltage setting for the chip's internal 
                 regulator.

        Cause:   Incorrect chip default.

        Fix:     The bootcode will update it to an optimal value.


    Enhancements:
    -------------
    1.  Request: The Non-volatile memory needs to be re-organized, 
                 separating manufacturing information from end-user 
                 configurable information. This minimizes NVM corruption 
                 in the manufacturing area if users accidentally corrupt 
                 the configurable information area thru any 
                 configuration utilities.

        Changes: Re-structure the NVM mapping and shared memory format.

        Impact:  This change obseletes the old NVM format that is 
                 currently deployed. Users need the latest xdiag 
                 (v0.7.5), along with a utility script to upgrade the
                 flash content to conform to the new format. Any old
                 versions of xdiag should not be used for any NVM 
                 access (e.g. cfg and upgrade).


    2.  Request: Test loading of MBA.

        Changes: The phase two of the bootcode is also released.

        Impact:  Users need to upgrade the phase two bootcode.


Version 0.2.2 (March 05, 2004)
----------------------------

    1.  Problem:
            No POST from some systems (CQ: TO00000079).

        Cause:
            Those systems have BIOS that will assign the chip with an 
            expansion ROM BAR and attempt to ask for data even if the 
            chip does not advertise its expansion ROM availability.

        Fix:
            The bootcode will service those expansion ROM requests with
            dummy data of 0, allowing the BIOS to continue booting up.


Version 0.2.1 (Feb 13, 2004)
----------------------------

    1.  Request:
            Disable PLL as a workaround for A0 on PCI-X.

        Changes:
            Set disable PLL bit at the beginning of the firmware.

        Impact:
            Allows the silicon to function on PCI-X. Host software
            should access the chip 20ms after the chip reset on a
            PCI-X slot.


Version 0.1.0 (Dec 10, 2003)
----------------------------

    Initial release - Support various BAR sizes, required for FPGA 
                      build v58 or later.



